Existing complementary metal oxide silicon (CMOS) semiconductor devices that are produced in mass quantities are referred to as "bulk" CMOS, because they include a semiconductive bulk substrate on which active or passive circuit elements are disposed. Recently, silicon oxide insulator (SOI) devices have been introduced which consume less power than do bulk CMOS devices, an important advantage in many applications such as battery-powered mobile telephones and battery-powered laptop computers. Also, SOI devices advantageously operate at higher speeds than do bulk CMOS devices.
SOI devices are characterized by a thin layer of insulative material (the so-called buried oxide layer, or "SOI") that is sandwiched between a bulk substrate and the circuit elements of the device. Typically, no other layers of material are interposed between the SOI and the bulk substrate. As used herein, the circuit elements establish a circuit component, such as an active transistor or passive component, e.g., a resistor.
In an SOI device, the circuit elements above the SOI are established by regions of field oxide and regions of a monocrystalline semiconductive layer which are doped as appropriate with N-type or P-type conductivity dopants. For example, for an N channel transistor, the isolated silicon layer will include a body region having a P-type dopant, with the body region being disposed between a source region and a drain region, each of which are doped with an N-type dopant, this forming an N channel metal oxide silicon field effect transistor (MOSFET) or a lateral NPN bipolar transistor, for example.
One disadvantage with SOI devices is that the voltage in body region tends to vary, or "float". As noted by Chen et al. in "Suppression of the SOI Floating-body Effects by Linked-body Device Structure", 1996 Symposium on VLSI Technology Digest of Technical Papers (1996 IEEE), consequences of floating body SOI devices include output current kinks, anomalous subthreshold currents, transient current overshoot, and early device breakdown.
Chen et al. propose suppressing the floating body effect by incompletely oxidizing the portion of a silicon layer that field oxidation is grown upon to allow field effect transistor (FEM) bodies to be linked together through the unoxidized silicon layer remaining beneath the field oxide. However, Chen et al. do not suggest how to implement their floating body suppression strategy in various component configurations, nor do Chen et al. suggest how to implement their floating body suppression strategy using techniques that can be easily undertaken using existing bulk CMOS fabrication principles. As recognized herein, it is important to enable circuit designers to implement various SOI components using existing bulk CMOS fabrication principles, to promote the use of SOI devices without requiring the reengineering of semiconductor fabrication apparatus and facilities.
Moreover, Chen et al. do not recognize that in some potential SOI circuit component configurations, such as dynamic threshold metal oxide silicon (DTMOS) devices that operate at very low voltages, the floating body effect might be desirable to retain. Indeed, in some circuit element assemblies it might be desirable that some SOI components exhibit floating body characteristics, with the floating body tendency of other SOI components in the assembly being suppressed.
Accordingly, it is an object of the present invention to provide an SOI device in which floating body effects are minimized. Another object of the present invention is to provide an SOI device in which floating body effects can be selectively minimized in some regions of the device and not in others. Still another object of the present invention is to provide a variety of SOI devices in which floating body effects can be minimized using fabrication principles. Yet another object of the present invention is to provide an SOI device that is easy to use and cost-effective to manufacture.